As part of its efforts to make devices faster and more efficient, Brewer Science is on the cutting edge of the technology that allows more transistors to fit into the same integrated circuit footprint as in the past.
A 3-D stacking process uses a new bonding material and 300-mm wafer bonders to effectively solve the industry-wide challenge of improving performance without increasing the cost and complexity associated with the development of smaller features. The industry impact of this new process has been compared to that of chemical mechanical polishing (CMP) from years ago.
Brewer Science’s advancements in the field allow for a low initial investment and easy entry into thin wafer technology, offering several options for incorporating such methods into production departments.
One of the company’s greatest challenges in doing so has been to formulate a temporary bonding material that can withstand temperatures as high as 300°C and interact favorably with the multiple semiconductor chemicals used. The bonding material must be capable of debonding without impacting the wafers themselves, since they’re narrower than a human hair and subject to delamination, bubbling, or other defects if they’re not carefully handled.
The wafer bonding process enables wafers made of silicon or other semiconductor materials thinned to 100 µm, rather than the more traditional size of 600 to 800 µm. To do this, Brewer Science implements one of three wafer bonding processes, each involving a different method of debonding.
With our own proprietary product, BrewerBOND® 220 material, each wafer is temporarily bonded to a rigid support, called a carrier, and subsequently thinned to 100 µm or less. This support eliminates bow or warp caused by due to internal stresses and forces generated during high-temperature processing. The wafer stack can survive exposure in a vacuum chamber at temperatures up to 250°C. Once processing completed, the thin wafer can be slid off the carrier and debonded via a relatively complex thermal-slide process that employs heat and lateral force. The debonding process requires the utmost attention because the wafers at that point are thin and fragile. But the final result is a single, higher-performance package for end users.
Brewer Science continues to provide the most advanced low-stress platforms on the market today and offers advanced modeling services to help engineers achieve ultimate efficiency in 3-D stacking.
Its new approach to integrated circuit packaging could very well define the future of microtechnology, and it is helping push those boundaries every day. Learn more about incorporating stacked integrated circuits into your products by calling 1-573-364-0300 or contacting us here.