Wafer-Level Packaging and the Mobile Revolution

Back in September and this past March, Apple held its biannual Special Events. These events are meant to introduce new products and features, and they happen quite regularly. These two recent events, however, seemed to leave something out: computers.

Topics: Integrated Circuits, wafer-level packaging, FOWLP, 2d, 3d

Glass Steps Into the Temporary Bonding Spotlight

Whoever first coined the cliché “Don’t sweat the small stuff” didn’t work in nanotechnology.

Topics: CS ManTech, Integrated Circuits, glass, Apogee, Compound Semiconductor Manufacturing, Datastream

Directed Self-Assembly: From the Top-Down to the Bottom-Up

In previous posts, we’ve made references to Moore’s law and how, with uncanny accuracy, it has predicted that the number of transistors in a dense integrated circuit (IC) would double approximately every two years. The semiconductor industry has tirelessly chased Moore's law ever since it was first coined in the 1970s, but as ICs have become smaller and smaller, traditional lithography processes have made it more and more difficult to keep up.

Topics: Integrated Circuits, Directed Self-Assembly, DSA

3-D Stacking and the Future of Integrated Circuits

In the early 1970s, Intel co-founder Gordon E. Moore coined the famous Moore's Law, predicting that the number of transistors in integrated circuits (and by extension, processing power) would double each year from then on. Though more of an observational musing than a physical law, it has been remarkably accurate ever since.

Topics: 3-D Stacking, silicon wafers, Integrated Circuits